Analysis and Mitigation of Power Supply Noise in High-Frequency PCB Design Process

In high-frequency PCBs, power supply noise stands out as a significant form of interference. This article conducts a comprehensive analysis of the characteristics and origins of power supply noise in high-frequency PCBs, and offers practical and effective solutions based on engineering applications.

A．Analysis of Power Supply Noise

Power supply noise refers to the noise generated or disrupted by the power supply itself. This interference is evident in the following aspects:

1. Distributed noise resulting from the inherent impedance of the power supply. In high-frequency circuits, power supply noise significantly impacts high-frequency signals. Therefore, the initial requirement is a low-noise power supply. Equally crucial are clean ground and power supply.

In an ideal scenario, the power supply would be impedance-free, resulting in no noise. However, in practice, the power supply possesses a certain impedance, which is distributed across the entire power supply, leading to the superimposition of noise. Hence, efforts should be made to minimize the power supply impedance. It is preferable to have a dedicated power plane and ground plane. In high-frequency circuit design, it is generally more effective to design the power supply in layers rather than in a bus format, ensuring that the loop consistently follows the path with the least impedance. Additionally, the power board provides a signal loop for all signals generated and received on the PCB, thereby minimizing the signal loop and reducing noise.

2. Common Mode Field Interference: This type of interference pertains to the noise between the power supply and the ground. It arises from the interference caused by a loop formed by the disrupted circuit and the common mode voltage resulting from the common reference surface. The magnitude depends on the relative electric and magnetic fields, and its intensity is relatively low.

In this scenario, the decrease in current (Ic) leads to a common-mode voltage in the series current loop, impacting the receiving section. If the magnetic field predominates, the common mode voltage generated in the series ground loop is given by the formula:

ΔB in formula (1) represents the change in magnetic induction intensity, measured in Wb/m²; S denotes the area in m².

For an electromagnetic field, when the electric field value is known, the induced voltage is given by Equation (2), which is generally applicable when L=150/F or less, with F representing the electromagnetic wave frequency in MHz. If this limit is exceeded, the calculation of the maximum induced voltage can be simplified as follows:

3. Differential Mode Field Interference: This refers to the interference between the power supply and the input and output power lines. In actual PCB design, the author observed that its contribution to power supply noise is minimal, and thus can be omitted here.
4. Interline Interference: This type of interference pertains to the interference between power lines. When there is mutual capacitance (C) and mutual inductance (M1-2) between two different parallel circuits, the interference will manifest in the interfered circuit if there is voltage (VC) and current (IC) in the interference source circuit:
   1. The voltage coupled through the capacitive impedance is given by Equation (4), where RV represents the parallel value of thenear-end resistance and the far-end resistance of the interfered circuit.
   2. Series resistance through inductive coupling: If there is common mode noise in the interference source, the interline interference generally appears in both common mode and differential mode.
5. Power Line Coupling: This phenomenon occurs when the power line transmits interferences to other devices after being subjected to electromagnetic interference from AC or DC power source This represents an indirect form of power supply noise interference on high-frequency circuits. It’s important to note that power supply noise may not necessarily be self-generated, but could also result from external interference induction, leading to the superimposition (radiated or conducted) of noise generated by itself, thereby interfering with other circuits or devices.

• Countermeasures to Eliminate Power Supply Noise Interference

Considering the various manifestations and causes of power supply noise interference analyzed above, the conditions leading to power supply noise can be specifically disrupted, effectively suppressing the interference. The following solutions are recommended:

• Attention to Board Through Holes: Through holes necessitate etching openings on the power supply layer to accommodate their passage. If the power layer opening is too large, it can affect the signal loop, forcing the signal to bypass and increasing the loop area and noise. If certain signal lines are concentrated near the opening and share this loop, common impedance can lead to crosstalk.
• Sufficient Ground Wire for Cables: Each signal requires its own dedicated signal loop, with the signal and loop area kept as small as possible, ensuring parallel alignment.
• Placement of Power Supply Noise Filter: This filter effectively suppresses internal power supply noise, enhancing system anti-interference and safety. It serves as a two-way RF filter, filtering out noise interference introduced from the power line (preventing interference from other devices) and noise generated by itself (to avoid interference with other devices), as well as cross-mode common mode interference.
• Power Isolation Transformer: This isolates the common-mode ground loop of the power supply loopor signal cable, effectively separating common-mode loop current generated at high frequencies.
• Power Regulation: Restoring a cleaner power supply can significantly reduce power supply noise.
• Wiring: The input and output lines of the power supply should be kept away from the edge of the dielectric board to avoid generating radiation and interfering with other circuits or equipment.
• Separate Analog and Digital Power Supplies: High-frequency devices are generally very sensitive to digital noise, so the two should be isolated and connected together at the power supply entrance. If a signal needs to cross both analog and digital domains, a loop can be placed across the signal to reduce the loop area.
• Avoid Overlapping Separate Power Supplies Between Different Layers: Attempt to stagger them to prevent power supply noise from being easily coupled through parasitic capacitance.
• Isolate Sensitive Components: Components such as phase-locked loops(PLLs) are highly sensitive to power supply noise and should be kept as far away as possible from the power supply.
• Placement of Power Cord: Placing a power line alongside the signal line, can reduce the signal loop and achieve noise reduction.
• Bypass Path Grounding: To prevent accumulated noise caused by power supply interference on the circuit boardand external power supply interference, the bypass path can be grounded on the interference path (excluding radiation), allowing the noise to be bypassed to the ground and avoiding interference with other devices and equipment.

In Conclusion: Power supply noise, whether generated directly or indirectly from the power supply, interferes with the circuit. When suppressing its influence on the circuit, a general principle should be followed: minimize the impact of power supply noise on the circuit while also reducing the influence of external factors or the circuit on the power supply to prevent degradation of power supply noise.