RF PCB VCO Phase Noise: Low-Frequency Noise from PCB Dielectric Materials Is Severely Underestimated

1. The Phase Noise That Shouldn't Be There

A voltage-controlled oscillator is designed with great care — the resonator is optimized, the active device is selected for low flicker noise, the tuning varactor is specified for high Q, and the power supply is meticulously filtered. The simulation predicts phase noise of -110 dBc/Hz at 10 kHz offset. The board is fabricated, assembled, and measured. The phase noise is -98 dBc/Hz — 12 dB worse than predicted.

The active device is within specification. The varactor is correct. The layout follows the reference design. Yet the close-in phase noise is significantly degraded.

The culprit is almost always overlooked: the PCB dielectric material itself.

In the design of low phase noise oscillators, the quality factor (Q) of the resonator is paramount. It is generally understood that high Q yields excellent close-to-carrier phase noise. However, the Q of a PCB resonator is not determined solely by the conductor geometry. It is fundamentally limited by the dielectric loss of the substrate — and dielectric loss is not a simple, static number. It has a frequency-dependent and, critically, a low-frequency noise component that is severely underestimated in most VCO designs.

The dielectric material of the PCB is not a passive, noiseless medium. It exhibits 1/f-like fluctuations in its dielectric constant and loss tangent. These low-frequency fluctuations modulate the resonant frequency of the oscillator, upconverting to phase noise that is indistinguishable from the oscillator's intrinsic 1/f³ noise. This effect is orders of magnitude larger in standard FR-4 than in high-performance RF substrates — and it is almost never included in circuit simulations.

This article examines why low-frequency noise from PCB dielectric materials is a dominant contributor to VCO close-in phase noise, quantifies the difference between FR-4 and high-Q substrates, and provides practical material selection and design strategies for achieving the phase noise your simulation promises.

2. The Phase Noise Puzzle: What the Traditional Models Miss

2.1 The Standard Phase Noise Model
The phase noise of an oscillator is typically modeled as a combination of three regions:

• 1/f³ region (close to carrier): Dominated by upconverted 1/f noise from the active device and, importantly, from low-frequency modulation of the resonator

• 1/f² region: Dominated by thermal noise in the resonator (proportional to 1/Q²)

• Floor region: Dominated by noise floor of the measurement system or output buffer

The 1/f³ region is the most critical for narrowband applications — PLL synthesizers, radar systems, and communication receivers. Traditional models attribute this noise primarily to the active device's flicker noise upconverted through the varactor or transistor nonlinearities.

2.2 What the Models Miss: Dielectric 1/f Noise
The dielectric material of the PCB is not electrically inert. It exhibits low-frequency noise in its dielectric constant (Dk) and dissipation factor (Df). These fluctuations arise from:

• Dipole relaxation dynamics: Polar molecules in the dielectric undergo thermally activated reorientations. The relaxation times follow a distribution, creating a 1/f spectrum of Dk fluctuations.

• Trapped charge dynamics: Charges trapped in defects within the dielectric (at grain boundaries, interfaces, or voids) fluctuate with a 1/f spectrum. These charge fluctuations modulate the local electric field and, consequently, the effective Dk.

• Mechanical stress fluctuations: Thermal expansion and mechanical stress in the dielectric create microscopic strain variations that modulate Dk.

These Dk fluctuations — typically in the range of parts per million — are negligible for most digital applications. For an oscillator, however, a 1 ppm fluctuation in Dk shifts the resonant frequency by approximately 0.5 ppm. At 5 GHz, that is a 2.5 kHz frequency modulation — directly translating into phase noise at the corresponding offset frequencies.

2.3 The Upconversion Mechanism
The low-frequency Dk noise modulates the resonator's effective capacitance and effective inductance. In an LC oscillator, the resonant frequency is:

f₀ = 1 / (2π √(L × C_eff))

where C_eff includes both the varactor capacitance and the parasitic capacitance from the PCB dielectric. Any fluctuation in Dk changes the parasitic capacitance, which modulates f₀.

This frequency modulation is indistinguishable from active-device 1/f upconversion. The phase noise contribution from dielectric 1/f noise appears in the 1/f³ region, close to the carrier — exactly where VCO performance is most critical.

3. The Q Factor: The Bridge Between Dielectric Loss and Phase Noise

3.1 Resonator Q and Phase Noise
The relationship between resonator Q and phase noise is fundamental:

L(f_m) ∝ 1 / (Q² × f_m²)

where L(f_m) is the phase noise at offset frequency f_m. A factor-of-2 reduction in Q degrades phase noise by 6 dB. A factor-of-10 reduction degrades phase noise by 20 dB.

The unloaded Q (Q₀) of a PCB resonator is limited by three loss mechanisms:

1. Conductor loss (copper resistance, skin effect)

2. Dielectric loss (dissipation factor, tan δ)

3. Radiation loss (leakage from the structure)

For microstrip resonators on standard PCB materials, dielectric loss is often the dominant limitation.

3.2 The FR-4 vs. High-Q Substrate Gap
The difference between FR-4 and high-performance RF substrates is not incremental — it is an order of magnitude.

Substrate: Alumina — tan δ: 0.0001 — Typical Q: ~200 — Phase Noise Penalty (relative to alumina): 0 dB (reference)

Substrate: Rogers RO3003 — tan δ: 0.0010 — Typical Q: ~50-100 — Phase Noise Penalty: ~3-6 dB

Substrate: Rogers RO4350B — tan δ: 0.003-0.004 — Typical Q: ~30-50 — Phase Noise Penalty: ~6-10 dB

Substrate: FR-4 — tan δ: 0.02-0.05 — Typical Q: 20-40 — Phase Noise Penalty: ~10 dB

The numbers are stark. A microwave VCO implemented on FR-4 has a resonator Q of only 20-40, compared to Q=200 on alumina. This low Q worsens the phase noise by approximately 10 dB.

A 10 dB phase noise penalty is catastrophic for any application requiring spectral purity — radar, satellite communications, or high-performance synthesizers. This penalty is not from the active device. It is from the PCB.

3.3 The Low-Frequency Noise Contribution to Q Degradation
The dielectric loss tangent (tan δ) is typically specified at a single frequency — often 10 GHz. This single number hides the frequency-dependent and low-frequency noise behavior of the dielectric.

At low frequencies (the 1/f³ region of phase noise), the dielectric's loss tangent may be significantly higher than its value at microwave frequencies. Dipole relaxation processes that are frozen at microwave frequencies become active at audio frequencies, creating additional loss and noise.

The low-frequency fluctuations in tan δ and Dk are not captured in standard material datasheets. They are not included in circuit simulations. They are the hidden factor that makes measured phase noise consistently worse than simulated phase noise — especially on FR-4.

4. Why FR-4 Is the Worst Offender

4.1 The FR-4 Problem
FR-4 is a glass-reinforced epoxy laminate. Its dielectric properties are adequate for digital and low-frequency analog applications. For microwave VCOs, it is problematic for three reasons:

High dissipation factor. FR-4 has tan δ of 0.02-0.05 — 20 to 50 times higher than Rogers RO3003 (tan δ = 0.0010). This high loss directly reduces resonator Q and degrades phase noise.

Dk instability. The dielectric constant of FR-4 is poorly controlled — typically specified as "4.2-4.8" with no tight tolerance. The Dk varies with frequency, temperature, and humidity. These variations create low-frequency noise that modulates the oscillator frequency.

Inhomogeneity. FR-4 is a composite of epoxy resin and woven glass fabric. The glass weave creates microscopic Dk variations across the board. These variations are static — they do not fluctuate with time. However, they create spatial inhomogeneity that couples with thermal and mechanical stress to produce 1/f-like fluctuations.

4.2 The Glass-Weave Effect
The woven glass fabric in FR-4 creates regions of high and low resin content. The Dk of glass (~6.0) is significantly higher than the Dk of epoxy (~3.5). As a result, the effective Dk of a microstrip line depends on whether the trace runs over a glass bundle or a resin-rich area.

When the board experiences thermal expansion or mechanical stress, the relative position of the glass bundles shifts slightly. This shifts the effective Dk seen by the resonator — creating low-frequency frequency modulation that appears as phase noise.

At millimeter-wave frequencies, this glass-weave effect can cause phase deviations of several degrees across a single board. For a VCO, even a fraction of a degree of phase deviation translates into measurable phase noise.

4.3 The Thermal Noise Connection
The dielectric loss tangent is directly related to the thermal noise generated in the dielectric:

Noise power ∝ tan δ × f × kT

The thermal noise from the dielectric adds to the resonator's noise, contributing to the 1/f² region of phase noise. However, the low-frequency fluctuations in tan δ — the 1/f noise of the dielectric itself — upconvert to the 1/f³ region.

FR-4, with its high tan δ and poor stability, generates both higher thermal noise and higher 1/f noise than low-loss substrates. The combination is a double penalty in phase noise performance.

5. Material Selection for Low Phase Noise

5.1 The Selection Criteria
For low phase noise VCOs, the PCB material must excel in three areas:

1. Low dissipation factor (tan δ): Directly determines resonator Q. Target tan δ < 0.002 at the operating frequency.

2. Stable dielectric constant: Dk variation with temperature (TCDk) and frequency must be minimal.

3. Low 1/f noise: The dielectric should exhibit minimal low-frequency fluctuations in Dk and tan δ.

Table 1 — PCB material comparison for VCO phase noise performance

5.2 When FR-4 Is Acceptable
FR-4 can be acceptable for VCOs in specific circumstances:

• Low frequency (<1 GHz): The dielectric loss is lower at lower frequencies, and the resonator dimensions are larger, making the impact of Dk fluctuations less severe.

• Wideband applications: If the VCO is used in a wideband PLL with a low loop bandwidth, the close-in phase noise is dominated by the reference, not the VCO.

• Cost-sensitive, non-critical applications: For consumer applications where -100 dBc/Hz at 1 MHz is sufficient, FR-4 may be adequate.

A recent study demonstrated an FR-4-based L-band VCO achieving -131.13 dBc/Hz at 1 MHz offset— performance comparable to Rogers-based designs at a fraction of the cost. However, this was achieved through strategic circuit architecture — differential negative-resistance topology and a butterfly-shaped low-pass filter — that compensated for FR-4's limitations. This shows that FR-4 can work, but only with exceptional circuit design.

5.3 When High-Performance Materials Are Mandatory
For applications requiring close-in phase noise below -100 dBc/Hz at 10 kHz — radar, satellite communications, 5G/6G infrastructure, test and measurement — FR-4 is not acceptable. High-performance substrates are mandatory.

Rogers RO3003 is often the material of choice for VCOs up to 77 GHz. Its Df of 0.0010 and Dk of 3.00 ± 0.04 provide the low loss and stability required for low phase noise. Its TCDk of only -3 ppm/°C ensures frequency stability across temperature.

PTFE-based materials (RT/duroid 5880, 5870) offer even lower loss (tan δ = 0.0002-0.0004) but have higher TCDk (-125 ppm/°C) and are more difficult to fabricate.

The choice depends on the frequency, temperature range, and phase noise requirement. For most applications, Rogers RO3003 offers the best balance of performance, manufacturability, and cost.

6. Design Strategies for Minimizing Dielectric-Induced Phase Noise

6.1 Material Selection Above All
The single most important decision for VCO phase noise is the PCB material. Do not use FR-4 for VCOs requiring better than -100 dBc/Hz at 10 kHz. The 10 dB phase noise penalty is insurmountable through layout or component selection alone.

6.2 Maximize Resonator Q
The resonator Q determines the phase noise in the 1/f² region and affects the 1/f³ region through the upconversion of low-frequency noise. To maximize Q:

• Use low-loss substrates with tan δ < 0.002

• Use thicker copper (1 oz or more) to reduce conductor loss

• Use wide traces to reduce skin-effect resistance

• Avoid vias in the resonant structure — vias add loss and create parasitic resonances

6.3 Minimize Parasitic Capacitance from the Dielectric
The parasitic capacitance from the PCB dielectric is part of the resonator's total capacitance. Any fluctuation in this capacitance — from Dk noise, thermal expansion, or humidity — modulates the oscillator frequency.

To minimize this effect:

• Keep the resonant structure away from ground planes — use suspended microstrip or elevated resonators where possible

• Use a ground-plane cutout beneath the resonator to reduce the electric field in the dielectric

• Minimize the area of the resonant structure to reduce the volume of dielectric that contributes to the capacitance

6.4 Thermal Management
Temperature changes cause Dk shifts (TCDk) that appear as low-frequency frequency modulation. To minimize thermal effects:

• Use materials with low TCDk — RO3003's -3 ppm/°C is excellent

• Provide thermal isolation for the VCO from heat-generating components

• Use a temperature-compensated bias or PLL to track out thermal drift

6.5 Power Supply Integrity
The low-frequency noise from the dielectric is modulated by the voltage across it. Any ripple or noise on the power supply creates a varying electric field in the dielectric, which modulates Dk and adds phase noise.

• Use ultra-low-noise LDOs for VCO power — switching regulators are unacceptable

• Add multiple decoupling capacitors (10 pF to 10 μF) to suppress noise across all frequencies

• Keep the VCO power trace short and direct — minimize series inductance

6.6 Layout Practices

• Keep the VCO away from digital circuitry — digital noise couples through the dielectric and modulates Dk

• Use a solid ground plane beneath the VCO to provide a stable reference

• Avoid ground loops — use a single-point ground for the VCO

• Shield the VCO with a grounded metal enclosure to prevent external fields from modulating the dielectric

7. Summary: The Dielectric Is Not Silent

The PCB dielectric material is not a passive, noiseless medium. It exhibits low-frequency 1/f noise in its dielectric constant and loss tangent that upconverts to VCO close-in phase noise. This effect is severely underestimated in most designs — and it is the primary reason why measured phase noise is consistently worse than simulation.

The key takeaways:

• PCB dielectric materials exhibit 1/f noise in Dk and tan δ — fluctuations that modulate the oscillator frequency

• FR-4 has a resonator Q of only 20-40, compared to Q=200 for alumina, creating a ~10 dB phase noise penalty

• The dielectric noise upconverts to the 1/f³ region — exactly where VCO phase noise is most critical

• Low-loss substrates (Rogers RO3003, PTFE) reduce both thermal noise and 1/f dielectric noise

• Material selection is the single most important decision for VCO phase noise — FR-4 is not acceptable for demanding applications

• Thermal management, power supply integrity, and layout all affect how dielectric noise couples into the oscillator

A VCO designed with a low-loss, stable PCB substrate — Rogers RO3003, PTFE, or alumina — will achieve the phase noise that the simulation predicts. A VCO on FR-4 will measure 10 dB worse— and the difference will be blamed on everything except the real culprit: the PCB dielectric itself.

8. Frequently Asked Questions

Q1: Why does the PCB dielectric material affect VCO phase noise?
A: The dielectric exhibits low-frequency 1/f noise in its dielectric constant (Dk) and loss tangent (tan δ). These fluctuations modulate the resonator's capacitance and Q, upconverting to close-in phase noise that is indistinguishable from active-device 1/f noise.

Q2: How much worse is FR-4 for VCO phase noise compared to high-performance substrates?
A: FR-4 has a resonator Q of only 20-40, compared to Q=200 for alumina. This low Q worsens the phase noise by approximately 10 dB — a catastrophic penalty for any demanding application.

Q3: What is the relationship between resonator Q and phase noise?
A: Phase noise in the 1/f² region is inversely proportional to Q². A factor-of-2 reduction in Q degrades phase noise by 6 dB. A factor-of-10 reduction degrades it by 20 dB.

Q4: What are the best PCB materials for low phase noise VCOs?
A: Rogers RO3003 (tan δ = 0.0010, TCDk = -3 ppm/°C) offers an excellent balance of low loss and stability. PTFE materials (RT/duroid) offer even lower loss (tan δ = 0.0002-0.0004) but have higher TCDk and are more difficult to fabricate.

Q5: Can FR-4 be used for VCOs at all?
A: Yes, for low-frequency (<1 GHz), wideband, or cost-sensitive applications where -100 dBc/Hz at 1 MHz is sufficient. However, for demanding applications requiring close-in phase noise below -100 dBc/Hz at 10 kHz, FR-4 is not acceptable.

Q6: What is the glass-weave effect and why does it matter?
A: The woven glass fabric in FR-4 creates microscopic Dk variations across the board. When the board experiences thermal or mechanical stress, these variations shift, creating low-frequency frequency modulation that adds phase noise.

Q7: How does temperature affect dielectric-induced phase noise?
A: Temperature changes cause Dk shifts (TCDk). These shifts appear as low-frequency frequency modulation. Materials with low TCDk (like RO3003 at -3 ppm/°C) minimize this effect.

Q8: Does power supply noise affect dielectric-induced phase noise?
A: Yes. Any ripple or noise on the power supply creates a varying electric field in the dielectric, which modulates Dk and adds phase noise. Ultra-low-noise LDOs and multiple decoupling capacitors are essential.

Q9: Can layout practices reduce dielectric-induced phase noise?
A: Yes. Keep the VCO away from digital circuitry, use a solid ground plane, avoid ground loops, and shield the VCO with a grounded metal enclosure to prevent external fields from modulating the dielectric.

Q10: How do I specify PCB material for a low phase noise VCO?
A: Specify a low-loss substrate with tan δ < 0.002 at the operating frequency. For critical applications, specify Rogers RO3003 (tan δ = 0.0010, Dk = 3.00 ± 0.04). Require material certification including Dk and tan δ measurements.

9. About Richfulljoy

Richfulljoy specializes in high-performance RF and microwave PCB manufacturing with a deep understanding of dielectric material behavior and its impact on VCO phase noise.